|Dr. Ted Letavic
Senior Fellow, GLOBALFOUNDRIES
|Short Bio: Dr. Ted Letavic obtained his PhD in Electrical Engineering from Rensselaer Polytechnic Institute. He has over 25 years of experience in the research, development, and industrialization of semiconductor systems. Ted is a Senior Fellow, GLOBALFOUNDRIES, with responsibility for system architecture and semiconductor technology requirements for strategic and emerging applications which include wired and wireless infrastructure, mobility, automotive, industrial, and high speed communications market segments.|
|Dr. Leon Stok
VP, Electronic Design Automation
IBM Systems Group
Title: From IoT to SoC
Abstract: Analysts project that by 2025, data from connected devices will yield actionable information that will drive potential economic value of as much as 11 trillion US$ . Sixty percent of existing enterprises are slated to adopt machine-to-machine IoT solutions over the next two years . IoT software platforms to enable, connect, secure, manage, and analyze such IoT solutions will be essential. This keynote will spell out what all of this means to the SoCs that will be the fabric of our IoT eco-systems.
 Unlocking the potential of the Internet of Things. McKinsey & Company, June 2015
 [The Forrester WaveTM: IoT Software Platforms, Q4 2016.
|Short Bio: Dr. Leon Stok is Vice President of IBM’s Electronic Design Automation group. Prior to this he held positions as director of EDA and executive assistant to IBM’s Senior Vice President of Technology and Intellectual Property and executive assistant to IBM’s Senior Vice President of the Technology group.
Dr. Stok studied electrical engineering at Eindhoven University of Technology, the Netherlands, from which he graduated with honors in 1986. He obtained a Ph.D. degree from Eindhoven University in 1991. He subsequently worked at IBM’s Thomas J. Watson Research Center as part of the team that developed BooleDozer, the IBM logic synthesis tool. He then managed IBM’s logic synthesis group and drove the development of PDS, IBM’s Placement-Driven Synthesis tool. Between 1999 and 2004, he led all of IBM’s design automation research as the Senior Manager of Design Automation at IBM Research.
Dr. Stok has published over sixty papers on many aspects of high level, architectural and logic synthesis, low power design, placement driven synthesis and on automatic placement and routing for schematic diagrams. He holds 13 patents in the area of EDA. He was elected an IEEE Fellow for the development and application of high-level and logic synthesis algorithm.
|Dr. Yervant Zorian
Chief Architect & Fellow, Synopsys
President of Synopsys Armenia
Title: Robustness Challenges in the Internet of Things
Abstract: The Internet of Things (IoT) is an extremely fragmented market and can be defined as anything from sensors to small servers. It is estimated that over 30 billion IoT devices will ship by 2020. The ability to sense countless amounts of information that communicates to the cloud is driving innovation into IoT applications, such as in wearable devices (for health, fitness or infotainment applications) and in machine-to-machine applications (in smart appliances, smart cities or commerce). It has become crucial for today’s IoT chips to use a range of new solutions during the design stage to ensure the robustness of manufacturing test, field reliability and security. DFT designers need to use new test and reliability solutions to enable power reductions during test, concurrent test, isolated debug and diagnosis, pattern porting, calibration, and uniform access. Moreover, the per unit IoT price remains a key factor in high volume production. Thus, minimizing the test cost while meeting the above technical issues is one of the major challenges of the IoT industry. This presentation, besides discussing the key trends and challenges of IoT, will cover solutions to handle the wide range of potential robustness challenges during all periods of the IoT lifecycle from design, post silicon bring-up, volume production, to in-system operation.
|Short Bio: Dr. Yervant Zorian is a Chief Architect and Fellow at Synopsys, as well as President of Synopsys Armenia. Formerly, he was Vice President and Chief Scientist of Virage Logic, Chief Technologist at LogicVision, and a Distinguished Member of Technical Staff AT&T Bell Laboratories. He is currently the President of IEEE Test Technology Technical Council (TTTC), the founder and chair of the IEEE 1500 Standardization Working Group, the Editor-in-Chief Emeritus of the IEEE Design and Test of Computers and an Adjunct Professor at University of British Columbia. He served on the Board of Governors of Computer Society and CEDA, was the Vice President of IEEE Computer Society, and the General Chair of the 50th Design Automation Conference (DAC) and several other symposia and workshops.
Dr. Zorian holds 35 US patents, has authored four books, published over 350 refereed papers and received numerous best paper awards. A Fellow of the IEEE since 1999, Dr. Zorian was the 2005 recipient of the prestigious Industrial Pioneer Award for his contribution to BIST, and the 2006 recipient of the IEEE Hans Karlsson Award for diplomacy. He received the IEEE Distinguished Services Award for leading the TTTC, the IEEE Meritorious Award for outstanding contributions to EDA, and in 2014, the Republic of Armenia’s National Medal of Science.
He received an MS degree in Computer Engineering from University of Southern California, a PhD in Electrical Engineering from McGill University, and an MBA from Wharton School of Business, University of Pennsylvania.